Files in this directory:

* nocs.png
	shows tested types of NoC topologies; A7 marks computation cores, MEM marks memory access nodes.

* nocbuilder.sim
	an example ArchOn script generated for 16-core NoC-B type.

* chars.xls
	contains the list of model characterisation parameters and their values.
	
* archon_results.xls
	contains simulation results for total power and execution time for all 4 NoC types at 5% cache miss rate and 20% cache miss rate.

* tau_amdahls.xsl
	compares bus-interconnect simulation results with the theoretical model (based on Li and Malek's work [1]).

Please see [2] for more information and details on the modelling and simulation methodology.
	
[1] X. Li and M. Malek, “Analysis of speedup and communication/computation
ratio in multiprocessor systems,” in Proceedings. Real-Time Systems Symposium, Dec 1988, pp. 282–288.

[2] Rafiev A, Xia F, Iliasov A, Romanovsky A, Yakovlev A. Selective Abstraction for Estimating Extra-Functional Properties in Networks-on-Chips using ArchOn Framework. In: 17th International Conference on Application of Concurrency to System Design (ACSD). 2017, Zaragoza, Spain: IEEE.