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FPGA based cerebellum Passager-of-Time (POT) data

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posted on 01.01.2015 by J Luo, G Coapes, T Mak, C Tin, P Degenaar
The data are all calculated from the designed FPGA based cerebellum processors. It presents the how biological cerebellum represents the timing information in spiking-patterns. The processing are followed by the Passage-of-Time model developed by Tadashi Yamazaki.

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